WHO:Andes Technology Corporation, the leading Asia-based supplier of small, low-power, high performance 32/64-bit embedded CPU cores, today announced that it will participate in the TSMC Open Innovation Platform® (OIP) Ecosystem Forum and exhibition.
WHAT:Emerson Hsiao, Senior VP Andes Technology USA Corp. will present "Evaluating the RISC-V Core in TSMC Process Technology – Low Power Perspective" during the breakout sessions of the TSMC OIP Forum. Andes management and technical staff will be on hand throughout the day in the TSMC OIP Exhibition area to explain Andes’ new RISC-V offerings and to answer any questions from attendees.
WHEN:Emerson Hsiao, Senior VP Andes Technology USA Corp. will present on Wednesday, October 3rd at 4:00 PM in the EDA/IP/Services Track of TSMC Open Innovation Platform (OIP) Ecosystem Forum.
WHERE:Visit Andes Technology Corp. in booth 519 of the TSMC OIP Ecosystem Exhibition at the Santa Clara Convention Center, 5001 Great America Parkway, Santa Clara, CA 95054. To schedule a meeting e-mail email@example.com.
Andes Technology Corporation was founded in Hsinchu Science Park, Taiwan in 2005 to develop innovative high-performance/low-power 32/64-bit processor cores and associated development environment to serve worldwide rapidly growing embedded system applications. The company delivers the best super low power CPU cores with integrated development environment and associated software and hardware solutions for efficient SoC design.
To meet demanding requirements of today's electronic devices, Andes Technology delivers configurable software/hardware IP and scalable platforms to respond to customers' needs for quality products and faster time-to-market. Andes Technology's comprehensive CPU includes entry-level, mid-range, high-end, extensible and security families to address the full range of embedded electronics products, especially for connected, smart and green applications.
For more information about Andes Technology, please visit http://www.andestech.com/